In the previous posts I have explained what the instruction does, the architecture and the control word for controlling all the elements of the architecture.
Now, let me try and explain how the instruction is actually entered in RAM.
The 'SUBNEG' instruction as I had explained in the first post has three 16-Bit operands. The RAM stores only one 'Byte' or 8-Bits in each address/memory location. So, we need to split each 16-Bit number further into 2 parts (2 bytes) and save them in consecutive addresses.
After splitting the number into 2 bytes we can name them as 'Higher Byte' and 'Lower Byte'.
So, suppose the number was A where,
A= 1011 0100 1100 1101 (#B4CD in hexadecimal)
I will call the lower byte as A(l) and higher byte as A(h) hence,
A(h)= 1011 0100 (#B4)
A(l)= 1100 1101 (#CD)
now that we have split the numbers we need to store them in 2 consecutive addresses lets assume for now the addresses are address #0000 and address #0001.
So, now the question is what part of address will you store first??will you store lower byte in address #0000 and higher byte in #0001?? or vice versa??
This choice of which byte is stored first is called the endianness of the processor. The processors can be of two types on the basis of endianness- Little Endian and Big Endian.
Little endian means that the lower byte is loaded first.
Big endian means that the higher byte is loaded first.
When thinking about the SUBNEG instruction's micro-codes we need to make sure we load the address bytes in the right order.
I personally will be going with the little endian format since even the modern processors by Intel and AMD follow that format (Also, I don't really if big endian has any advantages over little endian or vice versa, if you find something do let me know?).
Now, let's come back to the instruction executing part.....
Suppose we were in location #0000 we wanted to do the following:
1) Take number in location #0032 [B(l)= 32 ; B(h)= 00]
2) Subtract that number from the number in location #0033 [A(l)= 33 ; A(h)= 00]
3) Save it in the same location i.e. #0033
4) If the answer is negative go to #0120 [C(l)= 20 ; C(h)= 01]
so we have 6 bytes placed in 6 consecutive addresses in RAM:
Address Byte
#0000 #32 [B(l)]
#0001 #00 [B(h)]
#0002 #33 [A(l)]
#0003 #00 [A(h)]
#0004 #20 [C(l)]
#0005 #01 [C(h)]
The address its currently looking at depends on what's in the program counter. When the processor is first switched on and reset the program counter is set to #0000. So, the processor naturally starts getting the data from address #0000.
The basic idea is to:
1) Get the first number and save it in B latch.
2) Get the second number and subtract data of B latch from it and save the result in the Result latch.
3) Transfer data from the result latch to RAM.
So, the first thing to do is get the first number for subtraction in the B register by doing the following:
i. Put data from PC(#0000) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(l).
"Notice we loaded the first byte in Mem. Add. Ptr.(l) and not Mem. Add. ptr (h)?? That is because I decided that the processor will be little endian."
ii. Increment PC to #0001.
iii. Put data from PC(#0001) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(h).
"Now Mem. Add. Ptr. has the number #0032 stored."
iv. Put data from Mem. Add. Ptr.(#0032) onto the 16-Bit Address Bus and transfer data of Ram to B latch.
v. Increment the PC to #0002.
To get second number, subtract B from it and save it in result latch we do a similar thing:
i. Put data from PC(#0002) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(l).
ii. Increment PC to #0003.
iii. Put data from PC(#0003) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(h).
"Now Mem. Add. Ptr. has the number #0033 stored."
iv. Put data from Mem. Add. Ptr.(#0033) onto the 16-Bit Address Bus and put data of Ram on the 8-bit data bus and enable the read line of the result latch.
"Since the subtractor input is directly connected to the bus and B latch the result is automatically generated."
To get the result into the RAM we do the following:
i. Put data from Mem. Add. Ptr.(#0033) onto the 16-Bit Address Bus and transfer data from result latch to RAM.
ii. Increment PC to #0004.
The above mentioned processes complete the 'Subtraction' part of the SUBNEG instruction. Next, we need to do the conditional branch which actually is significantly simpler. To check if the result is negative we only see the MSB (Most Significant Bit) of the data in the Result latch.
If the MSB is 1, we do the following:
i. Put data from PC(#0004) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(l).
ii. Increment PC to #0005.
iii. Put data from PC(#0005) onto the 16-bit address bus and transfer data of RAM to Mem. Add. Ptr.(h).
"Now Mem. Add. Ptr. has the number #0120 stored."
iv. Transfer 16-bit data from Mem. Add. Ptr. to PC.
If the MSB is 0, we do the following:
i. Increment PC to #0005.
ii. Increment PC to #0006.
Below is the same process in a more concise form:
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